National Advanced Packaging Manufacturing Program (NAPMP) Advanced Packaging Research and Development (R&D) | 2025 NIST CHIPS NAPMP 01

Frequently Asked Questions (FAQs)

What is the NAPMP Advanced Packaging R&D funding opportunity?

The National Advanced Packaging Manufacturing Program (NAPMP) Advanced Packaging Research and Development (R&D) opportunity is a discretionary federal grant competition run by the National Institute of Standards and Technology (NIST) under CFDA 11.042. It supports R&D intended to accelerate and strengthen U.S. capabilities in semiconductor advanced packaging.

Which federal agency administers this grant competition?

This opportunity is administered by the National Institute of Standards and Technology (NIST).

What is the main goal of this funding opportunity?

The goal is to speed up the transition from promising advanced packaging ideas to reliable, manufacturable technologies, while helping build an enduring domestic advanced packaging ecosystem rather than one-off prototypes.

Why does the program emphasize modern computing needs like high-performance computing and low-power electronics?

The program highlights packaging breakthroughs that support modern computing demands such as high-performance computing and low-power electronics. These are described as central to scaling artificial intelligence (AI) hardware, and advanced packaging is positioned as a key enabler for these systems.

What types of projects is NIST looking to fund under this NOFO?

NIST is looking for advanced packaging R&D projects that can strengthen domestic capabilities and help the United States move faster toward manufacturable solutions. The opportunity specifically targets five R&D areas described in the NOFO summary.

What are the five targeted R&D areas?

The NOFO targets the following five areas:

1. Equipment, tools, processes, and process integration
2. Power delivery and thermal management
3. Connector technology, including photonics and radio frequency (RF)
4. Chiplets ecosystem
5. Co-design and electronic design automation (EDA)

What does "equipment, tools, processes, and process integration" mean in this context?

This area covers proposals that improve the manufacturing toolchain and improve how packaging steps fit together into a stable, high-yield production flow.

What is meant by "power delivery and thermal management" for advanced packaging?

This area reflects the challenges of dense, high-power chips, where limitations increasingly come from heat removal and from delivering clean power efficiently to complex 2.5D/3D assemblies.

What does the NOFO mean by "connector technology, including photonics and RF"?

This area points to the need for better high-bandwidth, low-loss ways to move data in and out of packaged systems, including optical (photonics) and high-frequency (RF) interconnect approaches.

What is the "chiplets ecosystem" focus area about?

This focus area signals interest in modular design approaches where multiple dies, potentially from different sources, are integrated into one package. The description highlights the need for standards, interfaces, assembly approaches, testing strategies, and supply chain coordination to enable chiplet-based packaging.

What does "co-design and EDA" refer to?

This area recognizes that advanced packaging performance depends on tightly coordinated chip, package, and system design, and on software tooling (electronic design automation) that can model, optimize, and verify complex multi-die systems.

Who is eligible to apply?

Eligibility is described as broad but strictly domestic. Applicants may include U.S.-based non-profit organizations, domestic accredited institutions of higher education, and State, local, and Tribal governments, as well as domestic for-profit organizations.

What does "strictly domestic" mean for eligibility?

To qualify as domestic, an entity must be incorporated in the United States (including U.S. territories) and have its principal place of business in the United States (including U.S. territories).

Are for-profit companies allowed to apply?

Yes. The eligibility list includes domestic for-profit organizations, provided they meet the domestic incorporation and principal place of business requirements.

Are universities and colleges eligible?

Yes. Domestic accredited institutions of higher education are listed as eligible applicants.

Are government entities eligible to apply?

Yes. State, local, and Tribal governments are listed among eligible applicant types, as long as they meet the domestic criteria described.

What is the funding opportunity number?

The funding opportunity number is 2025 NIST CHIPS NAPMP 01.

What CFDA number is associated with this opportunity?

The opportunity is listed under CFDA 11.042.

How many awards does NIST expect to make?

NIST expects to make about 10 awards.

When was this opportunity created?

The opportunity was created on 2024-10-18.

What is the original application closing date?

The original application closing date is 2024-12-20.

What is the maximum award amount (award ceiling)?

The award ceiling is not listed in the provided source information. Applicants would need to consult the full Notice of Funding Opportunity (NOFO) for detailed budget limits.

Are cost share requirements provided in the summary?

No. Cost share requirements (if any) are not included in the provided source information. The full NOFO would need to be consulted for cost share details.

Are the evaluation criteria included in the information provided?

No. The summary notes that evaluation criteria are not included in the provided source information and that applicants should consult the full NOFO for evaluation details.

Where can applicants find budget limits, cost share rules, and evaluation criteria?

Applicants are directed to consult the full Notice of Funding Opportunity (NOFO) for detailed budget limits, any cost share requirements, and evaluation criteria.